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Modified Synchronized SVPWM Strategies to Reduce Common-Mode Voltage for Three-Phase Voltage Source Inverters at Low Switching Frequency

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Indexed by:会议论文

Date of Publication:2018-01-01

Included Journals:CPCI-S、Scopus

Page Number:1330-1334

Key Words:low switching frequency; pulse width modulation; synchronized modulation; common-mode voltage

Abstract:Considering low switching frequency's influence on the modulation performance in electric traction system, this paper presents two modified synchronized SVPWM strategies with reduced common-mode voltage for the three-phase voltage source inverter. In the proposed methods, only nonzero voltage vectors are utilized to reduce the common-mode voltage, and the constraint conditions to acquire three-phase, half-wave and quarter-wave symmetries in terms of active voltage vectors is established. In addition, the voltage linearity range and common mode voltage characteristics are thoroughly investigated and compared with conventional SVPWM methods. Simulation and experimental results illustrate the validity and effectiveness of the algorithms.

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