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Indexed by:会议论文

Date of Publication:2005-10-13

Included Journals:EI、CPCI-S、Scopus

Volume:2

Page Number:889-892

Abstract:Blind source separation (BSS) has promising applications in many fields such as communications and biomedical engineering. It is often necessary to realize the BSS algorithm in real time. In this paper, field programmable gate arrays (FPGA) is used to implement the Information-maximization (Infomax) algorithm of BSS with a fixed-point number representation. A system design of the Infomax BSS algorithm in the case of 2 inputs and 2 outputs is presented by using the Quartus H, the DSP builder and the Simutink. Compared with ASIC design, FPGA implementation has many advantages including short development time, convenient design platforms and low costs.