Indexed by:Conference Paper
Date of Publication:2011-03-28
Included Journals:Scopus、EI
Volume:2
Page Number:749-752
Abstract:According to the structure and principle of PLL (Phase-Locked Loop) and system's stability, capture range and lock-up time, the VCO unit is designed. Based on 0.5 m CMOS mixed signal technology, Hspice is used to design and simulate the circuit. After designing the layout, Calibre is used to extract parasitic parameter and analyze the result of post-simulation. Applying the VCO (Voltage Controlled Oscillator) can realize the function of digital PLL and it also can be used as an independent IP hard core in the clock recovery of communication systems and frequency synthesis of digital system. ? 2011 IEEE.
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Academic Titles:控制科学与工程学院副院长
Other Post:大连理工大学电工电子国家级实验教学示范中心主任，大连理工大学电工电子国家级虚拟仿真实验教学中心主任
Gender:Male
Alma Mater:德国卡尔斯普厄科技大学
Degree:Master's Degree
School/Department:控制科学与工程学院
Discipline:Detection Technology and Automation Device
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