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A high performance multiple pattern matching algorithm based on FPGA

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Indexed by:期刊论文

Date of Publication:2014-10-01

Journal:Dongbei Daxue Xuebao/Journal of Northeastern University

Included Journals:EI、PKU、ISTIC、Scopus

Volume:35

Page Number:179-183

ISSN No.:10053026

Abstract:Pattern matching was the main part of content inspection based on network security systems. Along with the demands of high-speed information processing in the network, pattern matching algorithms just realized by software already can't satisfy users' needs. An ACF(Aho-Corasick-FPGA) algorithm combining with the characteristics of FPGA(field programmable gate array) was proposed on the basis of the Aho-Corasick(AC) algorithm. Failure function of AC algorithm was abandoned and the automata based on four bits and 16 forks of the tree was built. The results show that the memory efficiency of the ACF algorithm is improved one order of magnitude on average, and the matching efficiency is improved two orders of magnitude on average compared with AC algorithm. The corresponding architecture in single chip can achieve about 2.1 Gbps matching performance. ?, 2014, Northeastern University. All right reserved.

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