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A model for nanogrinding based on direct evidence of ground chips of silicon wafers

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Indexed by:期刊论文

Date of Publication:2013-09-01

Journal:SCIENCE CHINA-TECHNOLOGICAL SCIENCES

Included Journals:SCIE、EI、Scopus

Volume:56

Issue:9

Page Number:2099-2108

ISSN No.:1674-7321

Key Words:nanometer chip; nanogrinding; surface roughness; si wafer; TEM

Abstract:Nanometer chips were directly fabricated using face nanogrinding carried out by ultrafine diamond grits at room temperature. Direct evidence for ground nanometer chips is cuboid, and the average ratio of width to thickness is 1.49. Chips of 9.0 nm in thickness, 13.3 nm in width, and 16.0 in diagonal were achieved and confirmed using transmission electron microscopy. Based on the nanometer chips observed, a model was proposed according to the mass conservation and fundamental mechanism of face grinding. The surface roughness and thickness of damaged layers measured experimentally are in good agreement with the prediction of the developed model. The feed rate significantly affects the surface roughness and thickness of damaged layers, when keeping the wheel and table speeds constant, respectively.

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