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Indexed by:期刊论文

Date of Publication:2013-01-01

Journal:COMPUTERS & ELECTRICAL ENGINEERING

Included Journals:SCIE、EI

Volume:39

Issue:1,SI

Page Number:24-33

ISSN No.:0045-7906

Abstract:Embedded devices have gradually increased the demand for computing performance. In recent years, researches have focused on ways to maximize the performance of embedded multi-core SoC when the hardware consumption is very limited. This paper presents a new queueing network model and performance analysis method for embedded multi-core SoC based on task handling mechanism with priority. To calculate the blocking probability and queueing situation of the implementation for every executing core, finite capacity holding nodes are added to the queueing model, and an equivalent queueing network model is obtained. An adaptive load scheduling algorithm is designed, and the main scheduler is real-time scheduling by blocking and queueing the situation of each core. Common priority FIFO buffer, high-priority FIFO buffer queue, and semi-global FIFO buffer queue are a reasonable distribution. Finally, the approximate iterative algorithm is proposed for evaluating system performance. The experimental results indicate that the adaptive scheduling algorithm significantly improves the balance of task assignment. Crown Copyright (C) 2012 Published by Elsevier Ltd. All rights reserved.