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Indexed by:期刊论文

Date of Publication:2018-10-01

Journal:IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY

Included Journals:SCIE

Volume:8

Issue:10

Page Number:1855-1862

ISSN No.:2156-3950

Key Words:3-D IC; bump; dry film adhesive; wafer-level hybrid bonding

Abstract:A low-temperature wafer-level hybrid bonding process using micro Cu pillar solder bumps and photopatternable dry film adhesive is developed and investigated, where the microbumps and dry film adhesive are simultaneously bonded at a low temperature of 240 degrees C. The proposed hybrid bonding method has been applied to an 8-in wafer-to-wafer bonding. The effects of two kinds of bonding profiles, i.e., conventional bonding profile and optimized step applying force bonding profile, on post-bonding misalignment are evaluated, and the results show that a misalignment below 5 mu m is achieved using optimized step applying force bonding profile. In addition, by optimizing the total thickness difference between the bump part and the dry film adhesive part and by increasing the bonding force to 13 KN, a seam-free hybrid bonding interface can be achieved, which shows an average shear strength of about 21.3 MPa. Herein, the proposed method is highly cost-effective and promising for wafer-level low-temperature hybrid bonding aimed at the future 3-D integrated circuit integration.