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Indexed by:期刊论文
Date of Publication:2018-11-01
Journal:MATERIALS LETTERS
Included Journals:SCIE
Volume:230
Page Number:76-76
ISSN No.:0167-577X
Pre One:Study of Three-Dimensional Small Chip Stacking Using Low Cost Wafer-Level Micro-bump/B-Stage Adhesive Film Hybrid Bonding and Via-Last TSVs
Next One:Optimization and Characterization of Low-Temperature Wafer-Level Hybrid Bonding Using Photopatternable Dry Film Adhesive and Symmetric Micro Cu Pillar Solder Bumps
